Neuromorphic computing is one of the most exciting development fields in computing today. Many researchers are working on technologies that enable this ability to build networks of devices that try to mimic the functioning of the human brain. These are based on devices with their computing capacity, interconnected in a sophisticated network in which each party collaborates in the calculation tasks.

To achieve this, different approaches to in-memory computing are being evaluated. One of them intends to use the widespread 3D NAND flash memory technology to perform the computational operations of neuromorphic computing. Compared to other emerging memories, the problem with this technology is that its performance is inferior. Still, it also offers the advantage of being a proven and accessible technology at a much lower cost than other proposals.

Recently, a team of computer experts from the University of California has presented a new technology that improves the performance of 3D NAND memory in neuromorphic computing applications. They define its development as an ultra-compact and energy-efficient time-domain vector-per-matrix multiplier (VMM) based on a commercial 3D NAND memory structure.

As explained in their work, recently published in the specialized journal Neuromorphic Computing and Engineering, 3D-VMM uses a new successive rescaled resistive integration scheme (RSIR) to dispense with a charging capacitor as bulky as possible the one commonly used in other similar technologies. This reduces the overall device size and power consumption of conventional VMMs.

According to their analyzes, performed on a 55-nanometer technology node, RSIR-3D-VMM’s area efficiency and energy efficiency outperform existing 3D-VMM approaches by a factor of 1.3 to 5 times. And, unlike these, it is possible to adapt this technology to work in a smaller output range. Another innovation that these researchers have developed is another innovation called 3D-cortex, a multipurpose neuromorphic inference processor capable of taking advantage of the 3D-VMM block as a central processing unit.

Their tests have shown that 3D-cortex performance modeling targeting various next-generation neural network benchmarks achieves a record storage efficiency of 30.7 MB mm 2 and maximum energy efficiency of 113.3 Top / J and 10.66 Top / s in neuromorphic computing tasks. And they claim that the RSIR area efficiency improvement provides a lower delay in data transfer, managing to compensate for the VMM performance reduction thanks to a larger input time window.

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After the success that 3D NAND memory has had from almost its origins, this technology has evolved beyond conventional SSD hard drives, reaching most mobile devices, IoT, wearables, and even data centers. Data. But precisely in these environments, the maximum possible density is always sought without sacrificing performance, which has led manufacturers to continue innovating.

As a result of this advance, technologies such as V-NAND have emerged, whose chips also have a three-dimensional architecture but optimized by vertical and horizontal tracks, which accelerates performance. Also, similar innovations such as the so-called Three-Dimensional Race Track Memory (3D-RM) promise improvements over its predecessors.

Now, a team of Japanese researchers has developed a scheme with which they intend to improve the integration of all the elements in the three dimensions in this innovative technology and, therefore, its performance and scalability. To do this, they propose the use of a vertical 3D-RM loop formed by two horizontal nanowires and two other vertical ones, in which the magnetic anisotropy is perpendicular to the substrate.

In their work, published in the Journal of Physics D: Applied Physics, they explain that horizontal nanowires contain perpendicularly magnetized fields, while vertical nanowires are longitudinally magnetized, each with a different type of wall, showing deformation behavior. Distinct, allowing for improved three-dimensional architecture and integration over previous designs.

With this research, they intend to contribute to the development of this type of memory, which is not yet discussed much but could have a future in the electronics and computer industry. As the computer and storage capacity requirements of emerging applications increase, the industry seeks new technologies to meet the growing demand for density and performance in solid-state memory chips. This type of memory could provide useful solutions.

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